This invention relates generally to the conversion of amorphous or polycrystalline semiconductor materials to substantially single crystal semiconductor material by a process known as zone-melting recrystallization.
From transistors to very large scale integration of complex circuitry on a single chip, the field of solid state electronics has been built largely upon the abundant nonmetallic element silicon. Large diameter single crystal boules of silicon are sliced into wafers on which dopants, insulators and conductors are applied today using a variety of processes. Over the past few years, a major effort has been devoted to developing a new silicon-based technology involving the preparation of very thin films of pure single crystal silicon on the order of one-half micron thick, compared to the one-half millimeter thickness of typical silicon wafers. The new technology is called silicon-on-insulator (SOI) technology because the thin silicon film is supported by an insulating substrate. An efficient, reliable and economical process for producing thin film single crystal silicon has eluded researchers until now.
In comparison to device performance in bulk silicon, SOI promises significant advantages:
(1) improved speed performance in discrete devices and circuits resulting from reduced parasitic capacitance; PA1 (2) simplified device isolation and design layout, yielding potentially higher packing densities; and PA1 (3) radiation hard circuits for space and nuclear application. PA1 In addition, new SOI technologies may also be utilized for three-dimensional integration of circuits. PA1 (1) 1-3 hours in 100% NH.sub.3 ; PA1 (2) 20 minutes in O.sub.2 ; and PA1 (3) 1-3 hours in 100% NH.sub.3,
At present, there is one mature SOI technology, silicon-on-sapphire (SOS). However, the commercial utilization of SOS has been severely limited by its high cost, relatively poor crystalline quality, and difficulty in handling and processing in comparison to bulk Si.
Recently, a new SOI technology called zone-melting recrystallization (ZMR) based on standard silicon wafers rather than sapphire crystals has exhibited the potential for displacing SOS and for utilization on a much larger scale by the semiconductor industry. The development of ZMR has been frustrated by processing problems related to the physical chemistry of the interface between the molten silicon and adjacent silicon dioxide layers which gives rise to the so-called silicon beading phenomenon during ZMR.
SOI by the ZMR technique is produced by recrystallizing a fine-grained Si film on an insulating substrate. A typical sample structure consists of a silicon wafer coated with a 1 micron thermally grown SiO.sub.2 insulating layer, a half micron polycrystalline silicon (poly-Si) layer formed by low pressure chemical vapor deposition (LPCVD), topped by a 2 micron layer of CVD SiO.sub.2. The last layer forms a cover to encapsulate the polysilicon film constraining it while the film is being recrystallized.
SOI by the ZMR technique is described in a paper entitled "Zone Melting Recrystallization of Silicon Film With a Movable Strip Heater Oven" by Geis et al, J. Electrochem. Soc. Solid State Science and Technology, Vol. 129, p. 2813, 1982.
The sample is placed on a lower graphite strip and heated to a base temperature of 1100.degree.-1300.degree. C. in an argon gas ambient. Silicon has a melting point of about 1410.degree. C.; SiO.sub.2 has a higher melting point, about 1710.degree. C. Additional radiant energy is typically provided by a movable upper graphite strip heater which produces localized heating of the sample along a strip to a temperature between the two melting points. Moving like a wand, the upper heater scans the molten zone across the sample leaving a recrystallized SOI film beneath the solid SiO.sub.2 cap.
One of the major problems with this procedure arises out of an interaction between the surface tension of the molten silicon and the interface with the adjacent capping and insulating SiO.sub.2 layers resulting in poor wetting by the molten silicon. The silicon breaks apart and agglomerates into small beads or stripes. The resulting delamination can fracture the cap and cause defects in the crystalline structure of the silicon.
The silicon beading phenomena during ZMR is described in Weinberg al, "Investigation of the Silicon Beading Phenomena During Zone Melting Recrystallization", Applied Physics Letters 43(12) 15 December 1983, page 1105. This article also refers to the apparently beneficial effect of a silicon nitride (Si.sub.3 N.sub.4) CVD overlay on top of the SiO.sub.2 cap. This arrangement appeared to improve the wetting properties of the molten silicon on the silicon dioxide cap. A similar result is described in U.S. Pat. No. 4,371,421 to Fan et al entitled "Lateral Epitaxial Growth by Seeded Solidification", assigned to the assignee of the present application. The Weinberg article attributes the apparent wetting enhancement to the presence of nitrogen atoms not only in the encapsulation layers but in particular at the interface between the silicon layer and the overlying cap. Atomic nitrogen from the silicon nitride cladding probably diffuses through the 2 micron SiO.sub.2 cap to the poly-Si/cap interface and promotes wetting of the molten silicon on the SiO.sub.2 surface. However, problems with uniformity and reproducibility have arisen because of difficulty in controlling deposition of the nitride layer by CVD or by sputtering. Moreover, at best, this cladding technique does not readily lend itself to high volume simultaneous mass production or batch processing.